Approved Patent

• Pei, Luo, Ellen Liao, Lu Lu, Kathiravetpillai Sivanesan, and JoonBeom Kim. “Method for physical layer security protection using public keys.” U.S. Patent 10,425,810, issued September 24, 2019.

• 骆培，Mike Hong，Tong Sun，“一种用于共享内存中数据访存的方法、电子设备、存储介质和计算机程序产品”，（一种用于避免访问冲突的GPU共享存储单元的哈希算法, A Swizzle Algorithm to avoid Bank Clash in GPU Shared Memory），CN119938362A，2025.05.06授权

• 骆培，Mike Hong，Tong Sun, “计算核、数据处理方法、电子设备和存储介质”，（一种用于AI处理器的FP10和FP12的数据格式以及其存储和编解码方法, FP10 and FP12 Format Storage and Encoding, Decoding Method for AI Processors），CN120233982A，2025.07.01授权

• 骆培，Mike Hong, “人工智能芯片及其操作方法”，（一种用于AI处理器的统一的共享存储单元的架构, Efficient Shared Memory Architecture for AI Processor），CN120234295A，2025.07.01授权

• 骆培，谢轶，高鹏, “PCIE装置及其操作方法”，（一种支持乱序写执行的PCIE到AXI协议的桥接系统, A Switch Between PCIE and AXI Bus Supporting Out-of-Order Transmission），CN120578620A, 2025.09.02 授权

• 骆培，谢轶, 高鹏，James Huang, “ PCIE装置及其操作方法”，（一种PCIe虚拟ID的管理单元, Efficient Virtual ID Management Module in PCIE Controller），CN120578619A, 2025.09.02 授权

Journal Paper

• Pei Luo, Konstantinos Athanasiou, Yunsi Fei, Thomas Wahl, “Algebraic Fault Analysis of SHA-3 under Relaxed Fault Models”, IEEE Transactions on Information Forensics & Security, 2018

• Luo, Chao, Yunsi Fei, Liwei Zhang, A. Adam Ding, Pei Luo, Saoni Mukherjee, and David Kaeli. “Power Analysis Attack of an AES GPU Implementation.” Journal of Hardware and Systems Security (2018): 1-14.

• Pei Luo, Yunsi Fei, Liwei Zhang and A. Adam Ding, “Differential fault analysis of SHA-3 under relaxed fault models”, Journal of Hardware and Systems Security, Springer, (2017): 1-17.

• Zhang, Liwei, A. Adam Ding, Yunsi Fei, and Pei Luo. “Efficient Nonprofiling 2nd-Order Power Analysis on Masked Devices Utilizing Multiple Leakage Points.” in IEEE Transactions on Dependable and Secure Computing , vol.PP, no.99

• 骆培, 薛国凤. “基于USB2.0总线的航天设备地面检测系统.” 现代电子技术 34.10 (2011): 123-126.

Conference Paper

• Pei Luo, Konstantinos Athanasiou, Liwei Zhang, Zhen Hang Jiang, Yunsi Fei, A. Adam Ding, Thomas Wahl, “Compiler-Assisted Threshold Implementation Against Power Analysis Attacks”, The 35th IEEE Inter. Conference on Computer Design

• Pei Luo, Konstantinos Athanasiou, Y. Fei and T. Wahl, “Algebraic fault analysis of SHA-3,” Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 151-156.

• Pei Luo, Yunsi Fei, Liwei Zhang and A. Adam Ding, “Differential fault analysis of SHA3-224 and SHA3-256”, FDTC 2016 - Thirteenth Workshop on Fault Diagnosis and Tolerance in Cryptography, Aug., 2016

• Pei Luo, Cheng Li and Yunsi Fei, “Concurrent error detection for reliable SHA-3 design”, In Proceedings of the 26th ACM Great Lakes Symposium on VLSI, May, 2016

• Chao Luo, Yunsi Fei, Pei Luo, Saoni Mukherjee and David Kaeli, “Side-channel power analysis of a GPU AES implementation”, IEEE International Conference on Computer Design (ICCD), pp.281-288, Oct., 2015

• Xin Fang, Pei Luo, Yunsi Fei, and Miriam Leeser. “Leakage evaluation on power balance countermeasure against side-channel attack on FPGAs.” In High Performance Extreme Computing Conference (HPEC), 2015 IEEE

• Liwei Zhang, A. Adam Ding, Yunsi Fei, and Pei Luo, “A unified metric for quantifying information leakage of cryptographic devices under power analysis attacks”, Asiacrypt 2015

• Pei Luo, Yunsi Fei, Liwei Zhang, A. Adam Ding, “Towards secure cryptographic software implementation against side-channel power analysis attacks”, in Application-specific Systems, Architectures and Processors (ASAP), IEEE 26th International Conference on , pp.144-148, July 2015

• Xin Fang, Pei Luo, Yunsi Fei and Miriam Leeser, “Balance power leakage to fight against side-channel analysis at gate level in FPGAs,” 2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Toronto, ON, 2015, pp. 154-155.

• Liwei Zhang, A. Adam Ding, Yunsi Fei, Pei Luo, “Efficient 2nd-order power analysis on masked devices utilizing multiple leakage”, in 2015 IEEE International Symposium on Hardware Oriented Security and Trust

• Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, Miriam Leeser, and David R. Kaeli, “Side-channel analysis of MAC-Keccak hardware implementations”, in Hardware and Architectural Support for Security and Privacy, 2015

• Ding, A. Adam, Liwei Zhang, Yunsi Fei, and Pei Luo. “A statistical model for higher order DPA on masked devices.” In Cryptographic Hardware and Embedded Systems–CHES 2014, pp. 147-169

• Tushar Swamy, Neel Shah, Pei Luo, Yunsi Fei, and David Kaeli. “Scalable and efficient implementation of correlation power analysis using graphics processing units (GPUs).” In Hardware and Architectural Support for Security and Privacy, June, 2014

• Pei Luo, Yunsi Fei, Liwei Zhang, A. Adam Ding, “Side-channel power analysis of different protection schemes against fault attacks on AES,” International Conference on ReConFigurable Computing and FPGAs, Cancun, 2014

• Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, Miriam Leeser, and David R. Kaeli, “Power analysis attack on hardware implementation of MAC-Keccak on FPGAs”, 2014 Int. Conf. on Reconfigurable Computing and FPGAs.

• Pei Luo; Lin, AY.-L.; Zhen Wang; Karpovsky, M., “Hardware implementation of secure Shamir’s secret sharing scheme,” IEEE 15th International Symposium on High-Assurance Systems Engineering, Jan. 2014

• Pei Luo, Zhen Wang and Mark Karpovsky, “Secure Nand flash memories resilient to strong fault-injection attacks using Algebraic Manipulation Detection codes”, Proc. Int. Conference on Security and Management, 2013

• Shizun Ge, Zhen Wang, Pei Luo, Mark Karpovsky, “Secure memories resistant to both random errors and fault injection attacks using nonlinear error correction codes”, in Hardware and Architectural Support for Security and Privacy, June, 2013

• Shizun Ge, Zhen Wang, Mark Karpovsky, and Pei Luo. “Reliable and secure memories based on algebraic manipulation detection codes and robust error correction.” in Proceedings of the Sixth International Conference on Dependability (DEPEND). 2013

• Pei Luo, Jian Zhang, “SEU mitigation strategies for SRAM-based FPGA”, the 4th International Symposium on Photoelectronic Detection and Imaging, May 2011

• Pei Luo, Guofeng Xue, Jian Zhang, Xunfeng Zhao, “A kind of high reliability on-board computer”, 2011 2nd International Congress on Computer Applications and Computational Science, November 2011

• Pei Luo, Jian Zhang, “A high reliable SOC on-board computer based on Leon3”, 2012 IEEE International Conference on Computer Science and Automation Engineering, May 2012

Online Documents

• Pei Luo, Chao Luo, and Yunsi Fei. “System Clock and Power Supply Cross-Checking for Glitch Detection.” IACR Cryptology ePrint Archive 2016 (2016 ): 968

• Pei Luo, Liwei Zhang, Yunsi Fei, and A. Adam Ding. “An Improvement of Both Security and Reliability for Keccak Implementations on Smart Card.” IACR Cryptology ePrint Archive 2016 (2016 ): 214

• Pei Luo and Yunsi Fei. “Faulty clock detection for crypto circuits against differential fault analysis attack.” IACR Cryptology ePrint Archive 2014 (2014): 883.